PCB Design Mistakes: A Checklist for Your First Production Run
The common PCB design mistakes that cost first-time hardware teams a respin: footprints, heat, fab rules, layer count, panelization and firmware. With a checklist to run before you order.

Your prototype board works. The sensor reads, the radio connects, the firmware runs. The next step feels like ordering a few hundred and starting to sell. It rarely is.
A prototype proves the idea. A production board also has to survive automated assembly, temperature, static discharge and years of use, at a cost that makes sense. The same handful of PCB design mistakes decide whether a first production run goes well or ends in a respin. This post lists them, with a checklist you can run before you order.
1. Footprints that do not match the part
A footprint is the copper pattern the component is soldered to. If it does not match the real part, the board can look fine on screen and still fail at assembly: tombstoned passives, bridged pins, joints that never form. It usually enters the design late. Someone swaps a part during cost reduction, or a footprint is copied from a library nobody checked.
Parts do not share pad geometry just because they share a package name. Manufacturers publish a recommended land pattern in the datasheet, and IPC-7351 is the standard that defines land pattern geometry for surface-mount parts.
What to do: check every footprint against the recommended land pattern in the datasheet of the part you will actually buy, and recheck every footprint whose part changed. Print the board at 1:1 and lay real parts on it before the first order. It takes an afternoon and catches many footprint errors before they cost a board.
2. Heat that was never calculated
A linear regulator turns the voltage it drops into heat: power loss is roughly (input voltage minus output voltage) times load current. Dropping 5 V to 3.3 V at 500 mA is 1.7 V times 0.5 A, about 0.85 W, enough to need real copper area. That is arithmetic, and it is the arithmetic that gets skipped. The same goes for motor drivers, power MOSFETs, charger ICs and radio power amplifiers.
Heat is a layout decision, because the board is the heatsink. Datasheets give a thermal resistance for a stated test board. Your board is different, so what matters is how much copper the heat can spread into. Texas Instruments' layout guidance for exposed-pad packages is to solder the pad to a copper area and connect it with thermal vias to the other layers.
- Calculate worst-case dissipation for every regulator and driver, at the highest ambient temperature the product will see, not your bench.
- Follow the datasheet's land pattern and via recommendations for exposed pads.
- Keep hot parts away from temperature sensors, batteries and the crystal.
- If the numbers are tight, compare a switching regulator with a linear one plus more copper, and with the cost of a respin.
The failure pattern is familiar: it works at the desk, then resets or derates in a warm enclosure or in sun. A thermal check on paper before layout costs nothing, and a measurement on the first prototype in its real enclosure confirms it.
3. Designing to rules your fab does not use
Every fabricator publishes what it can build reliably: minimum track width and spacing, drill size, annular ring, solder mask bridge, via-in-pad options. These limits differ between fabs and between standard and advanced service levels. As an example, JLCPCB lists 0.10 mm minimum track width and spacing on 2-layer boards and 0.09 mm on multilayer, a 0.10 mm solder mask bridge, and for 2-layer boards an annular ring of 0.25 mm or more recommended with 0.18 mm as the absolute minimum. A different fab may list different numbers.
The trap is designing to the prototype fab's limits and then moving to a production partner whose process differs, or designing right at the edge of any fab's limit. A board built at the minimum has no margin for process variation, and yield is where that shows up.
- Choose the production fab and assembler before layout, and load their rules into your design rule check.
- Use margins above the minimums wherever the board has room. Save the tight geometry for the few places that need it.
- Upload the files to the fab's own checker early. Eurocircuits, for example, offers a PCB Checker that reports DFM data such as copper balance per layer, which relates to bow and twist.
- Ask which IPC class the boards are built to. Class 2 (dedicated service electronics) is the usual choice for commercial and industrial products; Class 3 is for high-reliability uses.
4. The wrong layer count
A 2-layer board is cheaper to make and fine for many simple designs. The problem is the return path. Every signal needs a path for its current to return, and on a 2-layer board that path is whatever ground copper you managed to leave. Uncontrolled return paths make larger loops, and larger loops radiate and pick up noise. A 4-layer stack-up of signal, ground, power and signal gives most signals an adjacent ground plane, and makes routing and power delivery easier.
We lean towards four layers when:
- The board carries fast digital interfaces such as USB or high-speed SPI, or has switching converters next to sensitive analog parts.
- The product needs EMC certification. A solid ground plane is the cheapest EMC measure you can build in.
- The routing is dense enough that a 2-layer board forces long detours or broken ground.
Radios deserve a precise statement. A radio does not force four layers. Espressif's ESP32 hardware design guidelines, for example, recommend a four-layer design for best performance and say a two-layer board can also be used with adjusted routing. What matters is the antenna keep-out and the ground around it, which the module vendor specifies: Espressif recommends at least 15 mm of clearance around an on-board PCB antenna and the antenna placed at the board edge. Read your module's guideline before you place anything. We go deeper on radios in our guide to
choosing a wireless protocol for a connected product.
The cost question deserves a calculation, not a rule: ask your fab for 2-layer and 4-layer quotes at your real volume, and compare the difference with the cost of one extra prototype round, including assembly and weeks of calendar time.
5. Panelization and assembly features forgotten
Boards are not assembled one at a time. They are placed on a panel with a frame, tooling holes and fiducials, and separated afterwards. How you design for that affects yield and cost.
- V-scoring suits rectangular boards with straight edges and does not use up space between boards. JLCPCB advises keeping components at least 1.0 mm from the score line, and 2.0 mm for tall or stress-sensitive parts, because depaneling puts stress on joints near the edge.
- Tab routing with mouse bites suits irregular outlines and edge connectors. It needs a routing channel between boards (JLCPCB gives about 1.6 to 2.4 mm), and components should stay about 0.5 mm from the routed edge.
- Fiducials: Eurocircuits requires at least three on the panel frame and recommends local fiducials on each board for better registration. The pick-and-place machine and the solder paste printer use them to find the panel.
- Panel border: Eurocircuits recommends a panel border of about 5 mm, with tooling holes and fiducials in it.
These numbers vary between assemblers, so treat them as examples and ask your assembler for its panel rules before you draw the outline. Many fabs and assemblers will panelize for you, but only if you tell them how the board must be separated and what sits near the edges.
6. The firmware dependency
The schematic is the contract between hardware and firmware. When the firmware engineer first sees it after the board is made, problems turn up that cannot be fixed in code.
- Pins routed to a function the chip does not offer on that pin. On most STM32 families a pin can carry up to 16 alternate functions (AF0 to AF15), and the datasheet's alternate function table says which peripheral is available on which pin.
- No programming or debug header, or one that cannot be reached once the board is in its enclosure.
- Boot-mode pins not accessible, so a bad flash cannot be recovered.
- No test points on the supply rails, the reset line and the main buses.
- UART TX and RX crossed, or a level mismatch between parts.
Most of the items above can be caught in a schematic review with the person who will write the firmware, before layout starts. For why firmware and power have to be designed together, see our firmware service and our guide to the five gates from prototype to shipping.
PCB design checklist before you order
- Every footprint checked against the datasheet land pattern of the part you will buy; changed parts rechecked.
- Worst-case power dissipation calculated for regulators, drivers and chargers; thermal vias and copper placed accordingly.
- Production fab and assembler chosen; their rules loaded into the design rule check; margins kept above minimums.
- Fab's online checker run on the real files.
- Layer count decided with a 2-layer and 4-layer quote, not a habit; radio keep-outs from the module datasheet respected.
- Panel outline, fiducials, tooling holes and edge clearances agreed with the assembler.
- Programming and debug access, boot pins and test points present and reachable in the enclosure.
- Firmware engineer, mechanical designer and the manufacturer have each reviewed the design.
- Pin functions checked in the microcontroller datasheet, one pin at a time; ESD protection and reverse-polarity protection on every external connector and supply input.
- Bill of materials checked for alternates: every second source has its own footprint verified.
How we work on this in projects
We design the electronics, the firmware and the enclosure under one roof, so the review above is one conversation rather than a hand-off. On a project like the Hoviv cattle wearable, our system design covered the module, the sensor stack, the power system and the firmware loop together, because on a battery device they cannot be decided separately. A power budget starts on the first day, and design for manufacture means production files, a bill of materials, DFM checks and a hand-off to a manufacturing partner.
If you already have a schematic or layout, we can review it by the hour before you spend on a run. For the stage that comes before and after, see our overview of taking a hardware idea to production and the steps in taking a product to market.
Frequently asked questions
What are the most common PCB design mistakes?
Footprints that do not match the part, heat that was never calculated, rules from the wrong fab, too few layers for the return paths, missing panel features, and a schematic that firmware never reviewed.
When should you use a 4-layer PCB?
When you have fast interfaces, switching converters beside analog circuits, EMC requirements, or routing so dense that a 2-layer board breaks the ground. A radio alone does not force it; follow the module vendor's layout guideline.
What is PCB panelization?
Arranging several boards on one larger panel with a frame, tooling holes and fiducials so machines can assemble them together. The boards are separated afterwards by V-scoring or by breaking tabs.
What is DFM in PCB design?
Design for manufacture: designing so the fab and the assembler can build the board reliably at the volume you need. In practice it means following their published rules with margin and running their checker before you order.
What is the difference between a 2-layer and a 4-layer PCB?
A 4-layer board has dedicated ground and power planes, which give short return paths and make EMC easier. A 2-layer board is cheaper to make and enough for simple designs. Ask for quotes on both before you choose.
What causes a PCB to fail?
At assembly: footprint mismatch, spacing below the process limit, poor panel features. In the field: heat, mechanical stress near edges and connectors, static discharge, and a power or ground layout that was never validated.
Want a second pair of eyes?
See how we work on electronics and PCB design, or book a short call and tell us where your board is. We will say what we would check first.
Sources
Checked on 2 October 2026. Most pages carry no publication date, so check them again before relying on a number:
- IPC: IPC-7351B, generic requirements for surface mount design and land pattern standard (table of contents)
- Wevolver: IPC Class 2 vs Class 3
- JLCPCB: PCB manufacturing capabilities
- JLCPCB: PCB panelization
- Eurocircuits: fiducials
- Eurocircuits: customer panel basics
- Eurocircuits: PCB Checker, DFM issues
- Texas Instruments: linear regulator design guide for LDOs (SLVA118)
- Texas Instruments: PowerPAD thermally enhanced package (SLMA002)
- Texas Instruments: PowerPAD layout guidelines (SLOA120)
- Altium Proto Express: PCB design guidelines for EMI and EMC (6 January 2026)
- Espressif: ESP32 hardware design guidelines, PCB layout
- STMicroelectronics community: what the alternate function numbers AF1, AF2 mean
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